I'm currently working on a large RTL design using Cadence Genus, and I'm running into some issues with hieratical synthesis and submodule resue.
My goal is to synthesize submodules independently, save its results and later reuse it during top-level synthesis to save runtime and memory resources. Here is what I tried, I firstly used "create_derived_design" to promote the submodule instance to a top-level design, ran synthesis and save result using write_db. Then, read the .db file in my top-level flow.
read_db submodule.db
read_hdl top_module.v
elaborate top_module
However, in some attempts, Genus treated the submodule as a black box. I checked the documentation, but it doesn't clearly explain whether write_db/read_db is fully supported for partial module reuse like this. Did I miss any steps? If write/read db is not supported for partial module resue is there any other method that I can use alternatively?