Hello all,
I made a design in SoC Encounter using NangateOpenCellLibrary 45nm. The layout had zero geometry and connectivity violations. I then needed to go to Calibre for LVS and PEX in order to do post-layout simulations, so I did the following in Encounter:
1) Design > Save > GDS/OASIS, then I provided the map file and merged library gds file that came with PDK "NangateOpenCellLibrary.gds" and didn't select "Uniquify cell names"....then finally hit Ok.
2)Design > Save > Netlist, and I selected the two options in the window and hit Ok.
Then for Calibre part:
1) I run "v2lvs" command to generate spice netlist for LVS
2) I then run LVS using Calibre -gui
In LVS transcript window, I get tons of these two warnings:
Open circuit - Same name on different nets:
Top level port name "KEXP0/n2089" at location (3.515,165.69) on net 2 not valid for netlisting; net id used instead.
(I think the above warning is the reason of the errors)
and in the LVS report I get these:
Error: Different numbers of ports (see below).
Error: Different numbers of nets (see below).
Error: Different numbers of instances (see below).
Error: Connectivity errors.
Error: Property errors.
Warning: Unbalanced smashed mosfets were matched.
Warning: Ambiguity points were found and resolved arbitrarily.
Warning: LVS property resolution maximum exceeded.
NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------
Layout Source Component Type
------ ------ -------------
Ports: 12065 35 *
Nets: 29877 29720 *
Instances: 1265 1261 * MN (4 pins)
790 790 MP (4 pins)
5781 0 * _invb (6 pins)
10551 16326 * _invv (4 pins)
(If you added instance "_invb" and "_invv" in both layout and source, they have the same total)
I don't have experience to debug these errors, so can anyone tell me how to debug them ?