Hello,
I'm closing a mixed signal design using innovus. I have the verilog netlist generate by RC compiler for the digital part and I generated the abstract view of the analog macro cell under IC6.1. I'm working with the AC18 hitkit design from AMS and the innovus design environment was set up using the script provided by AMS. When I load the design INNOVUS crashes because it does not find any timing library for the analog macro cell (this was defined as a block under the abstrac generator tool) with the following messages:
*WARN: (IMPSYC-2): Timing information is not defined for cell top4encounter; Check the timing library (.lib) file and make sure the timing information exists for the cell and you can run the checkTimingLibrary command to verify if the timing library has complete information after the design is loaded.
Type 'man IMPSYC-2' for more detail.
**FATAL ERROR[/icd/cm_t1nb_003/INNOVUS161/Rel/16.13/main/lnx86_64_opt/16.13-s045_1/fe/src/ri/riCheck.c:272:riCheckTimingLibrary]: There are 1 cells for which timing has not been defined. Timing should be defined for all non-physical cells in tape out mode
All the libraries (CORELIB, IOLIB and the analog library designed under IC6.1 are passed to INNOVUS through the OA database).
I actually shouldn't need a timing lib for this specific cell because it is the end point of the digital part: logic modules are used to generate timing signals that are required by the analog top cell and there is no digital signal coming back from this latter module.
Does anybody know how to fix this issue?
All the best
Gian Nicola