Dear Community
I am working on a digital design where the I/O pads are placed in a predefined location. The floorplan is described in a .def file where the pads are defined as follows:
COMPONENTS 55 ;
- I0 BBCUD4SF + PLACED ( 00) W ;
- I1 VDDPADF + PLACED ( 100 0 ) FN ;
- I2 GNDORPADF + PLACED ( 200 0 ) N ;
- I3 ICUDF + PLACED ( 300 0) W ;
< other definitions >
END COMPONENTS
The numbers are made up; don't pay attention to them. Furthermore, the pins are simply placed on top of the I/O pads where their MET1 pin is located according to the LEF file. So for example:
PINS 256 ;
- adc_in + NET adc_in
+ DIRECTION INPUT
+ PORT
+ LAYER MET1 ( 0 0 ) ( 280 280 )
+ FIXED ( 25 25) W ;
- vddd + NET vddd
+ DIRECTION INOUT
+ USE POWER
+ PORT
+ LAYER MET3 ( 0 0 ) ( 280 280 )
+ FIXED ( 125 25) FN ;
- vssd + NET vssd
+ DIRECTION INOUT
+ USE GROUND
+ PORT
+ LAYER MET3 ( 0 0 ) ( 280 280 )
+ FIXED ( 225 25) N ;
- adc_out + NET adc_out
+ DIRECTION OUTPUT
+ PORT
+ LAYER MET1 ( 0 0 ) ( 280 280 )
+ FIXED ( 325 25) W ;
< other definitions >END PINS
Finally, the Pads are defined in the gate-level netlist from the synthesis tool, which looks something like this:
module pads(<long list of ports>);
< other assignments >
BBCUD4SF i0_BBCUD4SF (< pin assignment >);
VDDPADF i0_VDDPADF (< pin assignment >);
GNDORPADF i0_GNDORPADF (< pin assignment >);
ICUDF i0_ICUDF (< pin assignment >);
endmodule
Now when I import everything into Innovus, the setup does not quite work yet. First of all, I get a warning that says
**WARN: (IMPFP-3961): The techSite 'io_site_F3V' has no related standard cells in the LEF/OA library. The calculations for this site type cannot be made unless standard cell models of this type exist in the LEF/OA library. Ignore this warning if the SITE is not used by the library. Alternatively, remove the SITE definition for the LEF/OA library to avoid this message.
Could someone explain what a "site" is in this context?
Moreover, Innovus does not recognize the connection between the pads in the netlist and the floorplan. I get several messages in the form
IoPad I1 is not in DB, created it.
IoPad I2 is not in DB, created it.
IoPad I0 is not in DB, created it.
IoPad I3 is not in DB, created it.
As a result, Innovus places I/O Pads randomly in my design and links them to the pins defined in the .def file rather than using the predefined pads. Which steps are necessary such that Innovus makes the link between the netlist and the floorplan? Also, are there any special steps required for power pins?
Thank you for any advice.