Hi all,
I'm going to implement a simple filter logic and I have two main questions in the following.
First, When I use the RCP flow there are some warnings associated with the provided LEF files from a foundry related to TECH(Process) definition section. It says that there are missing wire parameters such as CPERSQ ( capacitance per square ) and RPERSQ (resistance per square) in Layers definitions. Which seems may produce some issues in accurate estimation of RC values during RC extraction. (see the picture). As my design is really high speed I'm concerned about it. Is there any way to sort them?
Second, could we extract reliable lef files for a provided standard cell technology with any tools and use it instead? (both in front end and back-end design?)
Best regards,
Medya
