Quantcast
Channel: Cadence Digital Implementation Forum
Viewing all articles
Browse latest Browse all 1454

SRAM Design

$
0
0

I am designing a SRAM cell in 45nm technology. For reading and writing i am designing the complete circuit using a precharge, write driver and sense amplifier. When I an activating the precharge circuit bit lines are not pulling upto supply vdd. Can anyone help me regarding this problem?


Viewing all articles
Browse latest Browse all 1454

Trending Articles