How to constrain a large number of clocks and child clocks as asynchronous to each other?

Dear community

Our design has three main clocks. Let's call them clk1, clk2, and clk3. Each clock has several child clocks running at the same frequency. So the SDC file could look like this:

create_clock -name "clk1" -period 62.5 -waveform {0.0 31.25} [get_ports clk1]
create_clock -name "clk2" -period 250.0 -waveform {0.0 125.0} [get_ports clk2]
create_clock -name "clk3" -period 83.3 -waveform {0.0 41.65} [get_ports clk3]

create_generated_clock -name "clk1a" -divide_by 1 -source [get_ports clk1]   [get_pins clk1a]
create_generated_clock -name "clk1b" -divide_by 1 -source [get_ports clk1]   [get_pins clk1b]
create_generated_clock -name "clk1c" -divide_by 1 -source [get_ports clk1]   [get_pins clk1c]
...

create_generated_clock -name "clk2a" -divide_by 1 -source [get_ports clk2]   [get_pins clk2a]
create_generated_clock -name "clk2b" -divide_by 1 -source [get_ports clk2]   [get_pins clk2b]
create_generated_clock -name "clk2c" -divide_by 1 -source [get_ports clk2]   [get_pins clk2c]
...

create_generated_clock -name "clk3a" -divide_by 1 -source [get_ports clk3]   [get_pins clk3a]
create_generated_clock -name "clk3b" -divide_by 1 -source [get_ports clk3]   [get_pins clk3b]
create_generated_clock -name "clk3c" -divide_by 1 -source [get_ports clk3]   [get_pins clk3c]
...

The child clocks are, logically, synchronous to their parent clock and thus to other child clocks derived from the same parent clock, but asynchronous to child clocks from other parent clocks. So for example, clk1 and its childs clk1a, clk1b, clk1c, ... are asynchronous to clk2 and clk3 including their children. Vice versa, clk2 and clk3 are asynchronous to clk1 and its children. Same is true between clk2 and clk3.

How can I constrain this without having to write down every single combination?