I'm having trouble importing with my own standard cell library. I've synthesized a simple Verilog design into a netlist with RTL Compiler and am importing it into Virtuoso for LVS with a P&Red design. When I import the Verilog file, I'm getting the following warning: "Unable to find the Verilog definition for module<cell_name>. Therefore using library chirag_stdcells, cell <cell_name>, and view symbol as the symbol." I'm sure this isn;t causing errors for other stuff below but included it just to be sure.
When import finishes, my imported library has schematics for most of my sub-modules, but certain modules contain only a functional Verilog file and symbol, no schematic. For example, one of my designs csmarc_32_alu has six submodules total. Three modules have schematic and symbol views, but three others have only fuctional/symbol views, and the top level ALU has no schematic (as expected if bottom modules don't import).
For more info as to my custom standard cell library I have roughly 38 cells, all containing layout, schematic, abstract, symbol, and extracted views. I'm not sure if I'm missing any views necessary for successful import or if I missed something in RTL Compiler for the other modules without schematic view.
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Verilog netlist import not creating a schematic view for some modules.
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