Extract logic cells from design to match cells provided by pdk?
Hello,I'm completely new to this so please bear with me.If I'm provided with some standard cells, and would like to use a design that I have in an FPGA to port to an ASIC using the provided cells, how...
View ArticleLuxury Hotel in Delhi- Hotel Atithi Palace
If you are looking for an luxury room at Delhi then I would like to suggest you try areas like Daryaganj but if you want accommodation with nice environment and royal hotel in Delhi, then I would...
View ArticleD Flip-Flop with asynchronous reset characterization using Cadence Liberate
Hi , I am developing standard-library for technoloyg with few cells: NAND, NOR, NOT, LATCH, D Flip-Flop and D Flip-Flop with asynchronous reset. I am able to synthesize all cells except for the D...
View ArticleCreateSnapshot for an exact bbox
How can i write out an image for exact bbox size? currently i see innovus wirtes out snapshot of the entire layout view area. Thanks
View ArticleVarying a digital IIR filter's poles&zeros over time
Is there a better approach to varying the coefficients of a digital IIR over time to adjust the values of its poles and zeros than just recalculating the whole thing every time it changes? For example,...
View ArticleEncounter ECO metal mask change
Hi, In the first Encounter ECO run I executed command ( instructing the tool to use metal layers 1-4 ):ecoDesign -postMask -modifyOnlyLayers 1:4 …. and it seems to work fine.Latter I was asked to try...
View ArticleVarying a digital IIR filter's poles&zeros over time
Is there a better approach to varying the coefficients of a digital IIR over time to adjust the values of its poles and zeros than just recalculating the whole thing every time it changes? For example,...
View ArticleSpecial Route not connecting to Power Rings
Hi,I'm a newbie and I'm working on a mixed-signal chip in Innovus. I've got a few analog LEF files that I've imported into my floorplan as macros.My chip has got two power domains - VCC and VBAT.One of...
View ArticleStylus flowtool
Hi, I wanted to open a discussion on the stylus flowtool. My purpose is to see if there are users out there who are having success with the tool. To have some discussions around issues that I am...
View ArticleAbout using Liberate to create .lib for a cell with two separate outputs.
Hello, my name is Hsukang. I want to use Liberate to create a .lib file for the following circuit. This is a scan FF with two separate outputs. The question is that no matter how I described its...
View ArticleSpecial Route not connecting to Power Rings
Hi,I'm a newbie and I'm working on a mixed-signal chip in Innovus. I've got a few analog LEF files that I've imported into my floorplan as macros.My chip has got two power domains - VCC and VBAT.One of...
View ArticleWhat's the difference between Cadence PCB Editor and Cadence Allegro?
Are they basically the same thing? I am trying to get as much experience with Allegro since a lot of jobs I am looking at right now are asking for Cadence Allegro experience (I wish they asked for...
View ArticleCadence SoC Encounter 8.1 - Keyboard is not working
Hello, I am using Encounter 8.1. My mouse is working fine, but my keyboard is not working well in Encounter. I can type in some boxes, but in many boxes I cannot type. The binding key is also not...
View ArticleLVS Error
Hi, I am new to cadence. I started out designing an inverter and ran LVS. I made sure that the labels are matching in both schematic and layout. But I run into the following error while LVS stating...
View Articleregarding digital flow
Respected sir,How can i design and simulate cmos inverter using digital flow and also ineed to do prelayout ans post layout for the same cmos inverter..can i use cadence encounter for this experiments
View ArticleVoltus power analysis
Hi,I was wondering if it is possible to save the coordinates of each stripe and row of the power grid and if it is possible to find out the effective resistance between two given points using VoltusMy...
View ArticleLicense Issue
This are the Errors i am getting can you please provide the solution.Checking out license: Genus_Synthesis (12 seconds elapsed).License 'Genus_Synthesis' (main version: 17.2, alternate version: 17.2)...
View ArticleInnovus Stylus Common UI
How can I make innovus start with common UI instead of legacy? When I launch Innovus with command "innovus", I get the legacy UI. I have Innovus version 17.11 installed. Thanks in advance.
View ArticleHow do I write the LEF view of a power pad
I have a set of pads for use in a design and I was wondering which attributes should I put on each pin.Let's say it has the following pins: - inh_vdd, inh_vss, CORE, PAD where the first two are for...
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